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CHES'11 Posters

Modeling, simulation

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= CHES'11 Posters =
 * [[attachment:TPT_poster.pdf|Telecom ParisTech poster|&do=get]]
 * [[attachment:Lip6_Poster_CHES2011.pdf|Lip6 poster|&do=get]]
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- * [[attachment:Practical Results of EM Cartography on a FPGA-based RSA Hardware Implementation]]
+ * [[attachment:11_emc_RSAcarto.pdf|L. Sauvage, S. Guilley, J-L Danger, N. Homma, Y. Hayashi, “Practical Results of EM Cartography on a FPGA-based RSA Hardware Implementation,” EMC2011, pp. 768-772, Liong Beach, August 2011 |&do=get]]

 * [[attachment:EMC11_rsademod.pdf|O. Meynard, Y. Hayashi, N. Homma, S. Guilley, J-L Danger, “Identification of information leakage spots on a cryptographic device with an RSA processor,” EMC2011, pp. 773-778, Long Beach, August 2011|&do=get]]